Технічний опис SN54S112J TI
Description: DUAL J-K NEGATIVE-EDGE-TRIGGERED, Number of Bits per Element: 1, Max Propagation Delay @ V, Max CL: 7ns @ 5V, 15pF, Supplier Device Package: 16-CDIP, Clock Frequency: 125 MHz, Trigger Type: Negative Edge, Current - Output High, Low: 1mA, 20mA, Current - Quiescent (Iq): 25 mA, Voltage - Supply: 4.5V ~ 5.5V, Operating Temperature: -55°C ~ 125°C (TA), Type: JK Type, Function: Set(Preset) and Reset, Number of Elements: 2, Mounting Type: Through Hole, Output Type: Complementary, Package / Case: 16-CDIP (0.300", 7.62mm), Packaging: Tube.
Інші пропозиції SN54S112J
| Фото | Назва | Виробник | Інформація |
Доступність |
Ціна |
|---|---|---|---|---|---|
 |
SN54S112J | Виробник : Texas Instruments |
 Description: DUAL J-K NEGATIVE-EDGE-TRIGGEREDNumber of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 7ns @ 5V, 15pF Supplier Device Package: 16-CDIP Clock Frequency: 125 MHz Trigger Type: Negative Edge Current - Output High, Low: 1mA, 20mA Current - Quiescent (Iq): 25 mA Voltage - Supply: 4.5V ~ 5.5V Operating Temperature: -55°C ~ 125°C (TA) Type: JK Type Function: Set(Preset) and Reset Number of Elements: 2 Mounting Type: Through Hole Output Type: Complementary Package / Case: 16-CDIP (0.300", 7.62mm) Packaging: Tube |
товару немає в наявності |
|
 |
SN54S112J | Виробник : Texas Instruments |
Flip-Flops Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 |
товару немає в наявності |